FEATURES
·
Enable Signal is
SSTL_2 Compatible.
·
Optimized for Use in
DDR SDRAM Applications.
·
Flow-through
Architecture Optimizes PCB Layout.
·
Designed to be Used
With 200Mbps.
·
Switch on Resistance is
Designed to Eliminate the Need for Series Resistor to DDR SDRAM.
·
Internal 10-KW Pull-down on Output Enable Input.
·
Full DDR Solution
Provided When Used With CB857 and STL16857.
DESCRIPTION
This 10-bit FET bus switch
is designed for 3V to 3.6V Vdd operation and SSTL_2 output enable (OE*) input
levels. When OE* is LOW, the 10-bit bus switch is on and port A is connected to
port B. When OE* is HIGH, the switch is open, and a high-impedance state exists
between the two ports. The low on-state resistance of the switch allows
connections to be made with minimal propagation delay. The BS3857 is
characterized for operation from 0°C to 85°C.
FIG. 1. FUNCTIONAL BLOCK DIAGRAM